Vlsi Circuit Partitioning by Cluster - Removalusing Iterative Improvement
نویسندگان
چکیده
Move-based iterative improvement partitioning methods such as the Fiduccia-Mattheyses (FM) algorithm 3] and Krishnamurthy's Look-Ahead (LA) algorithm 4] are widely used in VLSI CAD applications largely due to their time eeciency and ease of implementation. This class of algorithms is of the \local improvement" type. They generate relatively high quality results for small and medium size circuits. However, as VLSI circuits become larger, these algorithms are not so eeective on them as direct partitioning tools. We propose new iterative-improvement methods that select cells to move with a view to moving clusters that straddle the two subsets of a partition into one of the subsets. The new algorithms signiicantly improve partition quality while preserving the advantage of time ef-ciency. Experimental results on 25 medium to large size ACM/SIGDA benchmark circuits show up to 70% improvement over FM in cutsize, with an average of per-circuit percent improvements of about 25%, and a total cut improvement of about 35%. They also outperform the recent placement based partitioning tool Paraboli 11] and the spectral partitioner MELO 12] by about 17% and 23%, respectively, with less CPU time. This demonstrates the potential of iterative improvement algorithms in dealing with the increasing complexity of modern VLSI circuitry.
منابع مشابه
Multi Objective Inclined Planes System Optimization Algorithm for VLSI Circuit Partitioning
In this paper multi objective optimization problem for partitioning process of VLSI circuit optimization is solved using IPO algorithm. The methodology used in this paper is based upon the dynamic of sliding motion along a frictionless inclined plane. In this work, modules and elements of the circuit are divided into two smaller parts (components) in order to minimize the cutsize and area imbal...
متن کاملAn Efficient Iterative Improvement Technique for VLSI Circuit Partitioning Using Hybrid Bucket Structures
In this paper, we present a fast and efficient Iterative Improvement Partitioning (IIP) technique for VLSI circuits and hybrid bucket structures on its implementation. Due to their time efficiency, IIP algorithms are widely used in VLSI circuit partition. As the performance of these algorithms depends on choices of moving cells, various such methods have been proposed. In particular, the Cluste...
متن کاملDesign driven partitioning
A new approach for partitioning VLSI digital integrated circuits is presented. In contrast to known approaches, which use only topological information, the presented method also exploits specific information about design modules and higher level design structure. Based on this knowledge, the design driven procedure creates a cluster structure that incorporates the inherent design relationships ...
متن کاملSimulated Annealing Approach onto VLSI Circuit Partitioning
Decompositions of inter-connected components, to achieve modular independence, poses the major problem in VLSI circuit partitioning. This problem is intractable in nature, Solutions of these problem in computational science is possible through appropriate heuristics. Reduction of cost that occurs due to interconnectivity between several VLSI components is referred in this paper. Modification of...
متن کاملGlobal Placement Techniques for VLSI Physical Design Automation
VLSI physical design automation plays a vital role as we move to deep sub-micron designs below 0.18 microns. Power dissipation, performance and area are dominated by interconnections between elements in the circuit under consideration. Global Placement followed by iterative improvement placement (detailed placement) is the most robust, simple and successful approach in solving the placement pro...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
دوره شماره
صفحات -
تاریخ انتشار 1996